SMC 2000 Series Provides DDR Memory Bandwidth and Capacity Expansion, Reliability and Media Flexibility for Next-Generation CPUs and SoCs to Improve AI and Machine Learning Performance
Constrained by processors adding storage channels, continuous computing demands from artificial intelligence (AI) and machine learning (ML) workloads, cloud computing, and data analytics deployed on traditional parallel-connected memory have reached the limits of efficiency. Microchip Technology Inc. today announced the expansion of its serial attached memory controller product lineup with the introduction of the new Compute Express Link™ (CXL™)-based SMC 2000 series of intelligent memory controllers that enable CPUs, GPUs and SoCs Ability to connect DDR4 or DDR5 memory using the CXL interface. The solution provides greater storage bandwidth and higher storage capacity per core and enables modern CPUs to optimize application workloads, thereby reducing the overall total cost of ownership in the data center.
The low-latency SMC 2000 16x32G and SMC 2000 8x32G memory controllers are designed to comply with the CXL 1.1 and CXL 2.0 specifications, DDR4 and DDR5 JEDEC standards, and support PCIe® 5.0 specification speeds. The SMC 2000 16x32G is the industry’s largest capacity controller with 16 channels, running at 32 GT/s, and supports two channels of DDR4-3200 or DDR5-4800, greatly reducing the host CPU required per memory channel or SoC pin count.
A typical CXL-connected memory module includes 512 GB or more of memory, providing an efficient mechanism to increase the memory bandwidth available for processing kernel transactions. This new paradigm shift allows data center operators to deploy a wider ratio of memory to CPU cores based on actual application needs, thereby increasing memory utilization and reducing total cost of ownership.
“Microchip is pleased to bring our first CXL-based serial memory controller to market,” said Pete Hazen, vice president of Microchip’s Data Center Solutions business unit. Indispensable. Microchip’s continued presence in the memory infrastructure market is focused on improving the performance and efficiency of a broad range of SoC applications to support the growing storage requirements of high-performance data center applications.”
Siamak Tavallaei, Chairman of the CXL Alliance, said: “The CXL Alliance was founded to provide the industry with an open standard to improve the performance of the next generation of data centers. We are delighted to see Microchip, as a key contributor to the CXL Alliance, introduce a CXL solution The solution will help build a new ecosystem for high-performance heterogeneous computing.”
Microchip’s SMC 2000 CXL-based memory controllers are innovatively designed to provide reliability, availability and serviceability (RAS) features that take the solution’s efficiency and performance to new levels. Connected via CXL, the SMC 2000 external memory controller enables a CPU or SoC to utilize multiple media types with different cost, power consumption and performance metrics without the need to integrate a dedicated memory controller for each different type of media. For example, by using the SMC 2000 controller with DDR-4 memory, advanced CPUs that only directly support DDR5 can now also reuse DDR-4 memory expansion. With dual-signature authentication and trusted platform support, secure commissioning, and secure firmware updates, the SMC 2000 CXL-based controller family can also meet all critical storage and enterprise application security needs.
Data center application workloads require future memory products that deliver the same high-performance bandwidth, low latency, and reliability as today’s parallel DDR-based memory products. The CXL platform is one of the biggest industry-disrupting technologies in recent years, bringing a new standard serial interface to the CPU that extends memory beyond the parallel DDR interface, delivering greater efficiency and performance to the data center.